3D FPGA startup lifts the veil

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Electronic News Today
March 10, 2010 FREE MAGAZINE SUBSCRIPTION (PRINT OR DIGITAL)
TOP STORY

TierLogic lifts the veil: another take on the 3D FPGA
TierLogic lifts the veil: another take on the 3D FPGAEDN Executive Editor Ron Wilson analyzes TierLogic, a large and expensive FPGA start-up that has been in stealth mode for years. Today the company unveiled a radical approach to increasing the density and utility of large programmable logic devices, and like previously-announced Tabula, TierLogic describes its design as a 3D FPGA. Read more about how the two approaches are totally unlike each other, and neither is related to the concept of 3D ICs—involving stacked dice and through-silicon vias—that is currently the hot topic in SoC-of-the-future circles, in this Practical Chip Design blog entry. Read more >>

For another take on TierLogic, see the FPGA Gurus blog:

Tier Logic’s Threefold Path

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